Passes

Reference for PyPTO IR transformations, organized for reading. Consult the pass manager for execution order.

Documentation numbering

The tables below are the current pass documentation index. Use the pass manager implementation (python/pypto/ir/pass_manager.py) to verify execution order and the conditions under which optional or backend-dependent passes run.

• 00 is the pass manager overview.
• 01–89 are reserved for pipeline pass pages, ordered by the default pipeline. Optional passes are identified in their entries and individual pages.
• 90 and above are reserved for utility passes and infrastructure. Utility passes that run at multiple positions are documented together rather than receiving a page number for every invocation.
• Documentation numbers are reading-order labels, not absolute execution slots: repeated utility passes and conditional passes can make those numbers differ.
• If a pipeline pass has no page yet, reserve its number and note the gap in the index so subsequent page numbers remain aligned.

When adding, removing, or reordering passes, update the affected page numbers, this index, the pass manager overview, site navigation, and cross-references. Keep the English and Chinese documentation synchronized.

Framework

Page	What it covers
Pass, PassContext, PassPipeline, and PassManager	Organizing and executing passes with property tracking, instrumentation, and strategy-based pipelines

Default pipeline

Order	Pass	What it does
01	InlineFunctions	Splices FunctionType.Inline bodies into every call site
02	UnrollLoops	Expands ForKind::Unroll loops at compile time
03	CtrlFlowTransform	Rewrites break / continue into structured control flow
04	ConvertToSSA	Converts to SSA form with variable renaming, phi nodes, and iter_args
05	Simplify	Folds arithmetic, shape expressions, and scalar constant bindings
06	FlattenCallExpr	Flattens nested call expressions into three-address form
07	OutlineHierarchyScopes	Outlines Hierarchy scopes into functions carrying level / role metadata
08	OutlineGraphScopes	Outlines pl.graph regions into FunctionType.Graph functions, converging the scope form with @pl.jit.graph
09	OutlineIncoreScopes	Outlines InCore scopes into separate functions
10	OutlineClusterScopes	Outlines Cluster scopes into Group functions and standalone Spmd scopes into Spmd functions
11	DeduplicateOutlinedKernels	Reuses closed outlined kernels and exclusive Group bundles while preserving every dispatch
12	ConvertTensorToTileOps	Converts tensor ops to tile ops in InCore functions, updating orchestration call sites
13	OptimizeOrchTensors	Eliminates redundant orchestration allocations and improves data flow
14	LowerCompositeOps	Decomposes composite tile / distributed ops into primitives
15	FlattenTileNdTo2D	Flattens 3D+ tile operations to 2D by merging all but the last dimension
16	BlockNzTensorViews	Rewrites logical pl.NZ tensors into pto-isa's blocked rank-5 form and retargets their tile.load coordinates
17	BlockMxScaleTensorViews	Migrates logical MX scale views into canonical packed rank-5 physical form
18	LegalizeTileCast	Expands tile.cast pairs the ISA cannot emit as one instruction into the shortest native chain
19	AutoTileMatmulL0	Picks an L0 tile shape (m, n, k) from the backend's L0 capacities and tiles matmuls to it
20	CanonicalizeTileSlice	Lowers tile.slice into the canonical tile.extract form
21	InferTileMemorySpace	Infers the on-chip MemorySpace of every tile and inserts tile.move to legalize mismatches
22	InsertMxScaleAddr	Inserts tile.tget_scale_addr before MX matmul consumers after memory spaces are resolved
23	ResolveBackendOpLayouts	Repairs backend-required tile layouts for elementwise ops
24	LowerAutoVectorSplit	Converts AUTO pl.split mixed InCore functions into the explicit split_aiv form
25	ExpandMixedKernel	Splits mixed InCore functions into separate AIC (Cube) and AIV (Vector) kernels
26	InjectGMPipeBuffer	Injects the __gm_pipe_buffer workspace for GM-routed cross-core pipes (Ascend910)
27	SplitVectorKernel	Stamps split attributes and handles the no-split dual-AIV path
28	StampTfreeSplit	Copies each cross-core tpop's split and pipe id onto its matching tfree op
29	NormalizeReturnOrder	Reorders every InCore function's return tuple into the canonical order
30	SkewCrossCorePipeline	Software-pipelines mixed cube/vector loops so the two cores overlap
31	LowerPipelineToSlots	Rotates a pl.pipeline body through the slots of one allocation instead of replicating it (memory_planner=PTOAS)
32	LowerPipelineLoops	Replicates pl.pipeline(N, stage=F) bodies F times to enable ping-pong buffering
33	CanonicalizeIOOrder	Reorders pipeline-body statements along the scalar → load → compute → store ladder
34	MaterializeTensorStrides	Fills in the packed canonical stride for every tensor view that carries none
35	InitMemRef	Initializes MemRefs and creates alloc operations with unallocated addresses
36	SelectBufferIRFunctions / MaterializeSemanticAliases	Forces buffers that program semantics require to be one allocation (loop-carry, in-place)
37	MemoryReuse	Reuses buffers by lifetime analysis and removes redundant allocs; skipped with memory_planner=DSA_RP or PTOAS
38	AllocateMemoryAddr	Assigns real addresses to existing alloc operations; skipped with memory_planner=PTOAS
39	FoldNoOpReshape	Folds tile.reshape calls that change neither physical shape nor allocation
40	FuseCreateAssembleToSlice	Fuses tensor.create + tensor.assemble into one tensor.slice view
41	LowerL2TensorCollectives	Rewrites a managed collective written in a CHIP orchestration body into one local builtin AIV task, with no per-device fan-out and no nested L2 dispatch
42	LegalizeSpmdLaunches	Guard potentially empty SPMD launches
43	DeriveCallDirections	Materializes wrapper ParamDirections, then derives a per-argument ArgDirection at every call
44	AutoDeriveTaskDependencies	Derives conservative task-to-task dependency edges
45	ExpandManualPhaseFence	Compresses profitable full-array TaskId dependencies in manual scopes
46	SynthesizeAllReduceSignals	Turns a host allreduce's optional signal into explicit internal signal IR
47	MaterializeCommDomainScopes	Assembles WindowBuffer and CommDomainScopeStmt wrappers in each host orchestration body
48	LowerHostTensorCollectives	Rewrites host-level tensor collectives into internal builtin chip dispatches
49	MaterializeDistTensorCtx	Materializes an explicit CommCtx parameter and argument per DistributedTensor
50	LegalizeGraphBoundary	Hoists the boundary scalars a Graph body derives out to its call sites, and rejects boundaries the host_build_graph runtime could not record
51	MaterializeRuntimeScopes	Inserts AUTO RuntimeScopeStmt nodes so orchestration codegen emits SIMPLER_SCOPE 1:1
52	ClassifyIterArgCarry	Classifies each orchestration ForStmt iter_arg as a trivial alias or a materialised rebind carry
53	InsertCommFence	Marks each publishing write (region system.cacheinvalid + system.fence locally, fence only for a remote write, whole-GM for an opaque one) and each wait (whole-GM system.cacheinvalid); the notify itself gets no marker
54	MaterializeValidShapeSymbols	Turns each device-kernel valid_shape symbol the kernel cannot bind into a leading Scalar[INDEX] parameter, fed the caller's actual valid extent
55	LowerTileToBuffer	Final conversion of selected kernels from planned Tile storage to explicit Buffer operations

Outside the default pipeline

Page	What it covers
Utility Passes	Normalization and cleanup passes that run at several pipeline positions
Diagnostics	The advisory channel for compile-time warnings and performance hints
IR Verifier	Pluggable property verifiers that validate IR correctness between passes

Shared material

Page	What it covers
Shared Pass Utilities	Reusable helpers in include/pypto/ir/transforms/utils/
Loop-Carried Compiler Dependency Compression	How loop-carried dependency edges are compressed

See Also

• IR — the representation these passes transform.
• Backend — how passes get per-architecture answers without branching on the backend.
• Code Generation — what runs once the pipeline is done.